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     / /_ \ \   / / /\ \ \\ \___/ /     / / /\ \___\
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   / / /  \/_// / /   / / / \ \ \        \ \ \
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verilator 5.048
Dependencies: perl@5.36.0 python@3.12.12 systemc@3.0.2
Channel: guix
Location: gnu/packages/electronics.scm (gnu packages electronics)
Home page: https://www.veripool.org/verilator/
Licenses: LGPL 3
Build system: gnu
Synopsis: Verilog/SystemVerilog HDL simulator and lint system
Description:

Verilator is an EDA tool intended to transform the specified Verilog or SystemVerilog HDL code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single or multi-threaded .cpp and .h files.

Total packages: 1