Enter the query into the form above. You can look for specific version of a package by using @ symbol like this: gcc@10.
API method:
GET /api/packages?search=hello&page=1&limit=20
where search is your query, page is a page number and limit is a number of items on a single page. Pagination information (such as a number of pages and etc) is returned
in response headers.
If you'd like to join our channel webring send a patch to ~whereiseveryone/toys@lists.sr.ht adding your channel as an entry in channels.scm.
This package provides a VHDL compiler and simulator.
This package provides the look and feel of Python unit testing to cocotb, removing the need of manipulating Makefiles.
Cocotb-bus provides a set of utilities, test benches and reusable bus interfaces to be used with cocotb.
This package is a waveform viewer for FST files.
Pcb-rnd is a Printed Circuit Board layout editor, part of the RiNgDove EDA suite.
qucsrflayout command exports RF schematics to KiCad layouts and OpenEMS scripts.
PulseView is a Qt based logic analyzer, oscilloscope and MSO GUI for sigrok.
This package provides a library to turn Python into a hardware description and verification language.
Route-rnd is a generic external autorouter for PCB using tEDAx file format, part of the RiNgDove EDA suite.
Qucs-S provides a fancy graphical user interface for a number of popular circuit simulation engines. The package contains libraries for schematic capture, visualization and components. The following simulation kernels are supported:
Ngspice (recommended)
Xyce
SpiceOpus
Qucsator (non-SPICE)
Sch-rnd is a standalone and workflow agnostic schematics capture tool for PCB, part of the RiNgDove EDA suite.
VUnit features the functionality needed to realize continuous and automated testing of HDL code.
Mcy is a tool to help digital designers and project managers understand and improve testbench coverage.
Sigrok-cli is a command-line frontend for sigrok.
OSVVM is a verification methodology that defines a VHDL verification framework, verification utility library, verification component library, scripting API, and co-simulation capability for FPGA or ASIC verification.
Nextpnr is a portable FPGA place and route tool.
Project IceStorm aims at documenting the bitstream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bitstream files.
Ngspice is a mixed-level/mixed-signal circuit simulator. It includes Spice3f5, a circuit simulator, and Xspice, an extension that provides code modeling support and simulation of digital components through an embedded event driven algorithm.
The Dirtywave M8 Tracker is a portable sequencer and synthesizer, featuring 8 tracks of assignable instruments such as FM, waveform synthesis, virtual analog, sample playback, and MIDI output. It is powered by a Teensy micro-controller and inspired by the Gameboy tracker Little Sound DJ. m8c is a client for M8 Headless which allows one to install the M8 firmware on any Teensy.
PySpice implements a Ngspice binding and provides an oriented object API on top of SPICE, the simulation output is converted to Numpy arrays for convenience.
The codePyVcd Python library writes VCD files as specified in IEEE 1364-2005.
Nextpnr is a portable FPGA place and route tool.
The JSON-for-VHDL library provides a parser to query JSON data structures from external files on disk. It provides a context to be used in the declarative section of design units.
UHDM is a complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener.