Pydigitalwavetools is a Python library to parse, write and format digital wave files in VCD format, a standardized ASCII format used to store simulation data from Verilog and other hardware description languages.

Verilator transforms the specified Verilog or SystemVerilog code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single- or multi-threaded .cpp and .h files.

This is a pythonized, kind of reverse engineered version of original AACircuit written by Andreas Weber in Borland Delphi. The idea and GUI layout are also taken from the original.

OSVVM is a verification methodology that defines a VHDL verification framework, verification utility library, verification component library, scripting API, and co-simulation capability for FPGA or ASIC verification.

Cocotb-bus provides a set of utilities, test benches and reusable bus interfaces to be used with cocotb.

OpenBoardView is a viewer for BoardView files, which present the details of a printed circuit board (PCB). It comes with features such as:

• Dynamic part outline rendering, including complex connectors

• Annotations, for leaving notes about parts, nets, pins or location

• Configurable colour themes

• Configurable DPI to facilitate usage on 4K monitors

• Configurable for running on slower systems

• Reads FZ (with key), BRD, BRD2, BDV and BV* formats.

Xyce is a SPICE-compatible, high-performance analog circuit simulator, capable of solving extremely large circuit problems by supporting large-scale parallel computing platforms. It also supports serial execution.

Pcb-rnd is a Printed Circuit Board layout editor, part of the RiNgDove EDA suite.

Prjpeppercorn includes programming tools for GateMate architecture from Cologne Chip. It also provides data needed to produce a nextpnr chip database Cologne Chip's GateMate architecture.

Project Trellis is a Nextpnr backend compatible with ECP5 FPGAs. The following features are currently available:

• logic slice functionality, including carries

• distributed RAM inside logic slices

• all internal interconnect

• basic IO, including tristate

• block RAM, using inference or manual instantiation

• multipliers using manual instantiation

• global networks and PLLs

• transcievers (DCUs.)

Ngspice is a mixed-level/mixed-signal circuit simulator. It includes Spice3f5, a circuit simulator, and Xspice, an extension that provides code modeling support and simulation of digital components through an embedded event driven algorithm.

Nextpnr is a portable FPGA place and route tool.

Libfst is a small library used to read and write FST format waveforms.

SystemC is a C++ library for modeling concurrent systems, and the reference implementation of IEEE 1666-2011. It provides a notion of timing as well as an event-driven simulations environment. Due to its concurrent and sequential nature, SystemC allows the description and integration of complex hardware and software components. To some extent, SystemC can be seen as a Hardware Description Language. However, unlike VHDL or Verilog, SystemC provides sophisticated mechanisms that offer high abstraction levels on components interfaces. This, in turn, facilitates the integration of systems using different abstraction levels.

Project IceStorm aims at documenting the bitstream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bitstream files.

Surf is a python library with support functions for VHDL gateware digital design. It provides implementation modules compatible with FPGA and ASIC design.

PulseView is a Qt based logic analyzer, oscilloscope and MSO GUI for sigrok.

Libserialport is a minimal shared library written in C that is intended to take care of the OS-specific details when writing software that uses serial ports.

Qucs-S provides a fancy graphical user interface for a number of popular circuit simulation engines. The package contains libraries for schematic capture, visualization and components. The following simulation kernels are supported:

• Ngspice (recommended)

• Xyce

• SpiceOpus

• Qucsator (non-SPICE)

This package provides a library to turn Python into a hardware description and verification language.

This package is a waveform viewer for FST files.

SimbyYosys is a front-end program for yosys-based formal hardware verification flows.

Xyce is a SPICE-compatible, high-performance analog circuit simulator, capable of solving extremely large circuit problems by supporting large-scale parallel computing platforms. It also supports serial execution.

Comedilib is a user-space library that provides a developer-friendly interface to Comedi devices. Comedi is a collection of drivers for a variety of common data acquisition plug-in boards. The drivers are implemented as a core Linux kernel module providing common functionality and individual low-level driver modules.