Comedilib is a user-space library that provides a developer-friendly interface to Comedi devices. Comedi is a collection of drivers for a variety of common data acquisition plug-in boards. The drivers are implemented as a core Linux kernel module providing common functionality and individual low-level driver modules.

Prjpeppercorn includes programming tools for GateMate architecture from Cologne Chip. It also provides data needed to produce a nextpnr chip database Cologne Chip's GateMate architecture.

fftgen produces FFT hardware designs in Verilog.

Coroutine based cosimulation test bench environment for verifying VHDL and Verilog RTL using Python.

Verilator transforms the specified Verilog or SystemVerilog code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single- or multi-threaded .cpp and .h files.

Xschem is an X11 schematic editor written in C and focused on hierarchical and parametric design. It can generate VHDL, Verilog or Spice netlists from the drawn schematic, allowing the simulation of the circuit.

Libsigrokdecode is a shared library written in C, which provides (streaming) protocol decoding functionality.

The Dirtywave M8 Tracker is a portable sequencer and synthesizer, featuring 8 tracks of assignable instruments such as FM, waveform synthesis, virtual analog, sample playback, and MIDI output. It is powered by a Teensy micro-controller and inspired by the Gameboy tracker Little Sound DJ. m8c is a client for M8 Headless which allows one to install the M8 firmware on any Teensy.

Camv-rnd is a viewer for PCB supporting gerber, excellon and g-code. It is part of the RiNgDove EDA suite.

Libserialport is a minimal shared library written in C that is intended to take care of the OS-specific details when writing software that uses serial ports.

This package provides the look and feel of Python unit testing to cocotb, removing the need of manipulating Makefiles.

The JSON-for-VHDL library provides a parser to query JSON data structures from external files on disk. It provides a context to be used in the declarative section of design units.

This package provides a VHDL compiler and simulator.

Ngspice is a mixed-level/mixed-signal circuit simulator. It includes Spice3f5, a circuit simulator, and Xspice, an extension that provides code modeling support and simulation of digital components through an embedded event driven algorithm.

OSVVM is a verification methodology that defines a VHDL verification framework, verification utility library, verification component library, scripting API, and co-simulation capability for FPGA or ASIC verification.

Ngspice is a mixed-level/mixed-signal circuit simulator. It includes Spice3f5, a circuit simulator, and Xspice, an extension that provides code modeling support and simulation of digital components through an embedded event driven algorithm.

ABC is a program for sequential logic synthesis and formal verification. This is the Yosyshq fork of ABC.

Project Trellis is a Nextpnr backend compatible with ECP5 FPGAs. The following features are currently available:

• logic slice functionality, including carries

• distributed RAM inside logic slices

• all internal interconnect

• basic IO, including tristate

• block RAM, using inference or manual instantiation

• multipliers using manual instantiation

• global networks and PLLs

• transcievers (DCUs.)

Xoscope is a digital oscilloscope that can acquire signals from ALSA, ESD, and COMEDI sources. This package currently does not include support for ESD or COMEDI sources.

UHDM is a complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener.

Qucsator-rf is a command line driven circuit simulator targeted for RF and microwave circuits. It takes a network list in a certain format as input and outputs an XML dataset.

Fx2lafw is free firmware for Cypress FX2 chips which makes them usable as simple logic analyzer and/or oscilloscope hardware.

The Amaranth project provides an open-source toolchain for developing hardware based on synchronous digital logic using the Python programming language, as well as evaluation board definitions and a System on Chip toolkit.

Mcy is a tool to help digital designers and project managers understand and improve testbench coverage.