Enter the query into the form above. You can look for specific version of a package by using @ symbol like this: gcc@10.
API method:
GET /api/packages?search=hello&page=1&limit=20
where search is your query, page is a page number and limit is a number of items on a single page. Pagination information (such as a number of pages and etc) is returned
in response headers.
If you'd like to join our channel webring send a patch to ~whereiseveryone/toys@lists.sr.ht adding your channel as an entry in channels.scm.
Commandline client for exercism.io, a free service providing mentored learning for programming languages.
FET is a program for automatically scheduling the timetable of a school, high-school or university. It uses a fast and efficient timetabling algorithm.
Usually, FET is able to solve a complicated timetable in maximum 5-20 minutes. For extremely difficult timetables, it may take a longer time, a matter of hours.
Tagaini Jisho is a Japanese dictionary and kanji lookup tool. It aims at becoming your Japanese study assistant. It allows you to quickly search for entries and mark those that you wish to study, along with tags and personal notes. It also let you train entries you are studying and follows your progression in remembering them. Finally, it makes it easy to review entries you did not remember by listing them on screen or printing them on a small booklet.
Tagaini Jisho also features complete stroke order animations for more than 6000 kanji.
Codeforces Tool is a command-line interface tool for Codeforces. Its features include:
support Contests, Gym, Groups and acmsguru
support all programming languages in Codeforces
submit codes
watch submissions' status dynamically
fetch problems' samples
compile and test locally
clone all codes of someone
generate codes from the specified template (including timestamp, author, etc.)
list problems' stats of one contest
use default web browser to open problems' pages, standings' page, etc.
setup a network proxy and setup a mirror host
Commandline client for exercism.io, a free service providing mentored learning for programming languages.
This package provides a minimal Linux loader as an UEFI program.
This package provides tools for signing EFI binaries.
This package provides EFI tools for EFI key management and EFI variable management.
The EFI Analyzer checks EFI binaries and prints out header and section information.
This package provides an EFI toolchain for building programs that can run in the environment presented by Intel's EFI.
This package provides a library to turn Python into a hardware description and verification language.
Pcb-rnd is a Printed Circuit Board layout editor, part of the RiNgDove EDA suite.
Nextpnr is a portable FPGA place and route tool.
Libserialport is a minimal shared library written in C that is intended to take care of the OS-specific details when writing software that uses serial ports.
Yosys synthesizes Verilog-2005.
Pydigitalwavetools is a Python library to parse, write and format digital wave files in VCD format, a standardized ASCII format used to store simulation data from Verilog and other hardware description languages.
ABC is a program for sequential logic synthesis and formal verification.
SimbyYosys is a front-end program for yosys-based formal hardware verification flows.
The Dirtywave M8 Tracker is a portable sequencer and synthesizer, featuring 8 tracks of assignable instruments such as FM, waveform synthesis, virtual analog, sample playback, and MIDI output. It is powered by a Teensy micro-controller and inspired by the Gameboy tracker Little Sound DJ. m8c is a client for M8 Headless which allows one to install the M8 firmware on any Teensy.
Route-rnd is a generic external autorouter for PCB using tEDAx file format, part of the RiNgDove EDA suite.
Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code written in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate an intermediate form called vvp assembly. This intermediate form is executed by vvp. For synthesis, the compiler generates netlists in the desired format.
Libfst is a small library used to read and write FST format waveforms.
Hdlmake helps manage and share HDL code by automatically finding file dependencies, writing synthesis and simulation Makefiles.
Coroutine based cosimulation test bench environment for verifying VHDL and Verilog RTL using Python.