Enter the query into the form above. You can look for specific version of a package by using @ symbol like this: gcc@10.
API method:
GET /api/packages?search=hello&page=1&limit=20
where search is your query, page is a page number and limit is a number of items on a single page. Pagination information (such as a number of pages and etc) is returned
in response headers.
If you'd like to join our channel webring send a patch to ~whereiseveryone/toys@lists.sr.ht adding your channel as an entry in channels.scm.
This package provides a VHDL compiler and simulator.
The Amaranth project provides an open-source toolchain for developing hardware based on synchronous digital logic using the Python programming language, as well as evaluation board definitions and a System on Chip toolkit.
The codePyVcd Python library writes VCD files as specified in IEEE 1364-2005.
Pydigitalwavetools is a Python library to parse, write and format digital wave files in VCD format, a standardized ASCII format used to store simulation data from Verilog and other hardware description languages.
Nextpnr is a portable FPGA place and route tool.
Magic is an interactive EDA layout tool. It can run DRC and LVS tests and can assist with automatic routing.
VUnit features the functionality needed to realize continuous and automated testing of HDL code.
Camv-rnd is a viewer for PCB supporting gerber, excellon and g-code. It is part of the RiNgDove EDA suite.
Ngspice is a mixed-level/mixed-signal circuit simulator. It includes Spice3f5, a circuit simulator, and Xspice, an extension that provides code modeling support and simulation of digital components through an embedded event driven algorithm.
OpenBoardView is a viewer for BoardView files, which present the details of a printed circuit board (PCB). It comes with features such as:
Dynamic part outline rendering, including complex connectors
Annotations, for leaving notes about parts, nets, pins or location
Configurable colour themes
Configurable DPI to facilitate usage on 4K monitors
Configurable for running on slower systems
Reads FZ (with key), BRD, BRD2, BDV and BV* formats.
Open source materials intended for reference by the IEEE standard 1076, as approved and published by the VHDL Analysis and Standardization Group.
Verilator transforms the specified Verilog or SystemVerilog code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single- or multi-threaded .cpp and .h files.
Gerbv is a viewer for files in the Gerber format (RS-274X only), which is commonly used to represent printed circuit board (PCB) layouts. Gerbv lets you load several files on top of each other, do measurements on the displayed image, etc. Besides viewing Gerbers, you may also view Excellon drill files as well as pick-place files.
Libserialport is a minimal shared library written in C that is intended to take care of the OS-specific details when writing software that uses serial ports.
UHDM is a complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener.
Migen FHDL is a Python library that replaces the event-driven paradigm of Verilog and VHDL with the notions of combinatorial and synchronous statements, has arithmetic rules that make integers always behave like mathematical integers, and allows the design's logic to be constructed by a Python program.
qucsrflayout command exports RF schematics to KiCad layouts and OpenEMS scripts.
Project Trellis is a Nextpnr backend compatible with ECP5 FPGAs. The following features are currently available:
logic slice functionality, including carries
distributed RAM inside logic slices
all internal interconnect
basic IO, including tristate
block RAM, using inference or manual instantiation
multipliers using manual instantiation
global networks and PLLs
transcievers (DCUs.)
The JSON-for-VHDL library provides a parser to query JSON data structures from external files on disk. It provides a context to be used in the declarative section of design units.
Libfst is a small library used to read and write FST format waveforms.
This package provides an extension to cocotb in the form of AXI, AXI lite, and AXI stream modules.
Xschem is an X11 schematic editor written in C and focused on hierarchical and parametric design. It can generate VHDL, Verilog or Spice netlists from the drawn schematic, allowing the simulation of the circuit.
OpenSTA is a gate level static timing verifier. As a stand-alone executable it can be used to verify the timing of a design using standard file formats.
Pcb-rnd is a Printed Circuit Board layout editor, part of the RiNgDove EDA suite.